• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    There is provided a computer that can safely rewrite any one of the areas where a boot program is stored with fewer actions in the self-mode. A nonvolatile memory is divided into a plurality of areas, each of which is separately erasable and includes a user area and a boot area designation flag indicating whether the corresponding user area is specified as a boot area. An area designation flag specifies the user area containing a boot program among a plurality of user areas. A CPU sets the value of the area designation flag based on the values of a plurality of boot area designation flags. When a system is started, the user area including the program for starting the operation of the CPU is determined based on the value of the area designation flag.
    公开号:US20010008011A1
    申请号:US09/753,112
    申请日:2001-01-02
    公开日:2001-07-12
    发明作者:Kaori Oba
    申请人:NEC Corp；
    IPC主号:G06F9-4406
    专利说明:
    [0001] 1. Field of the Invention [0001]
    [0002] The present invention relates to a computer, and in particular, to techniques for rewriting the contents of a nonvolatile erasable memory, which stores computer programs, when a user operates a computer. [0002]
    [0003] 2. Description of the Related Art [0003]
    [0004] A conventional computer, which is built into equipment such as an automobile and controls the operation of the equipment, has a structure as shown in FIG. 4. [0004]
    [0005] When a computer operates in the writer-rewriting mode in which a writer device (not shown in the figures) placed in a factory rewrites the contents of a nonvolatile memory [0005] 6, a CPU (Central Processing Unit) 2 starts the execution of instructions contained in programs that are stored in a boot memory 7.
    [0006] On the other hand, when the computer operates in the user mode in which a user operates the computer, the CPU [0006] 2 starts the execution of instructions contained in programs that are stored in a user area A61 of the nonvolatile memory 6 in accordance with a directive sent from a start address selection circuit 8.
    [0007] Additionally, when the computer operates in the self-mode in which the contents of the nonvolatile memory [0007] 6 are rewritten (re-programmed) during which a user operates the computer, instructions that are necessary for the rewriting operation in addition to a boot program are transferred to a RAM (Random Access Memory) 5 from the nonvolatile memory 6 or from the outside of the computer. Subsequently, the CPU 2 reads out the boot program and the instructions from the RAM 5, and then the CPU 2 executes these to rewrite the contents of the nonvolatile memory 6.
    [0008] According to the above-described technique, however, it may become impossible for the computer to continue to operate normally if a short break in the supply of power occurs during the erasure operation of the user area A[0008] 61 of the nonvolatile memory 6 where programs including the boot program are stored. Hereafter, the term “boot program” may be used as the representative of these programs including the boot program for convenience.
    [0009] Furthermore, even if the erasure operation is successfully completed, if a short break in the supply of power occurs while a new boot program is written into the nonvolatile memory [0009] 6, the writing operation may be carried out incompletely.
    [0010] In the above cases, even if a reset operation of the system were attempted to restart the system, it would be impossible to successfully restart the system because the new boot program was incompletely rewritten. In this way, the conventional computer as stated above has a problem in that the user area A[0010] 61 where a boot program may be stored cannot be safely erased in the self-mode.
    [0011] In order to solve this problem, techniques for safely rewriting the contents of a user area where a boot program is stored are disclosed in Japanese Unexamined Patent Application, First Publication, Nos. Hei 8-255084 and Hei 10-149282. [0011]
    [0012] Both publications employ a technique wherein when rewriting the boot program stored in a boot area, which corresponds to the user area A[0012] 61 shown in FIG. 4, the old boot program (i.e. the boot program currently used) is copied to an empty user area in order to back up this old boot program, and then the contents of the boot area are erased, after that a new boot program is written into the boot area, and then the old boot program that was copied to the empty user area is erased provided that the writing operation of the new boot program has been successfully completed.
    [0013] According to this technique, even if the new boot program were incompletely written because of a short break in the supply of power, the old boot program makes it possible to restart the system, thus a situation in which the restoration of the system becomes impossible can be avoided. [0013]
    [0014] The above-described technique, however, causes a problem in that it is required to perform many actions such as a copying operation of the old boot program to the empty user area, and an erasure operation of the old boot program once it is no longer necessary because of the completion of the writing operation of the new boot program. Therefore, the handling is complicated and substantial time is required to carry out the rewriting operation. [0014] SUMMARY OF THE INVENTION
    [0015] It is therefore an object of the present invention to provide a computer that is capable of safely rewriting boot programs stored in a nonvolatile memory with fewer actions in the self-mode (i.e. a mode for re-programming the contents of the nonvolatile memory with the nonvolatile memory being mounted onto a printed circuit board when a user operates the computer) by providing flags for every user area for specifying the boot area. [0015]
    [0016] A computer according to the present invention is provided with: a nonvolatile memory which is divided into a plurality of divided areas, each divided area being separately erasable and including a user area and a boot area designation flag indicating whether the corresponding user area is specified as a boot area; an area designation flag register which specifies the user area including a boot program among a plurality of user areas; and a processor which sets the value of the area designation flag register based on the values of a plurality of boot area designation flags, wherein the user area which stores the program for starting the operation of the processor is determined based on the value of the area designation flag register. [0016]
    [0017] Since the present invention is provided with boot area designation flags and an area designation flag register, it is possible to switch the user area that contains a boot program for starting a system, and the rewriting of a boot program stored in the nonvolatile memory can always be carried out with the presence of the old boot program that is currently used. For this reason, even if a rewriting operation has not been completed normally due to a short break in the supply of power while the rewriting operation is carried out in the self-mode, it possible to restore the system by performing the rewriting operation once again. Accordingly, the rewriting operation can be performed with fewer actions in a short period. [0017] BRIEF DESCRIPTION OF THE DRAWINGS
    [0018] FIG. 1 is a block diagram showing the structure of a computer that is capable of rewriting a boot program when a user operates the computer in accordance with an embodiment of the present invention. [0018]
    [0019] FIG. 2 is a flowchart showing a procedure for rewriting a boot program. [0019]
    [0020] FIGS. 3A to [0020] 3E are explanatory diagrams illustrating process for rewriting a boot program stored in a user area of a nonvolatile memory, FIG. 3A showing a state before the rewriting, FIG. 3B showing a state after erasing another program stored in a user area B12, FIG. 3C showing a state after writing a new boot program into the user area B12, FIG. 3D showing a state after setting a boot area designation flag B22 to “boot”, and FIG. 3E showing a state after erasing the boot program stored in a user area A11.
    [0021] FIG. 4 is a block diagram showing the structure of a computer in accordance with a related art. [0021] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
    [0022] Hereafter, an embodiment of the present invention will be explained with reference to the drawings. FIG. 1 is a block diagram showing the structure of a computer in accordance with an embodiment of the present invention. This computer is capable of rewriting a boot program while a user operates the computer in the self-mode. [0022]
    [0023] In FIG. 1, reference numeral [0023] 1 denotes a nonvolatile memory that may store programs, each of which may include a boot program, and comprises two user areas A11 and B12 and the corresponding boot area designation flags A21 and B22. A boot area designation flag containing “0” indicates that the corresponding user area is specified as the boot area. Conversely, a boot area designation flag containing “1” indicates that the corresponding user area is not specified as the boot area.
    [0024] A CPU [0024] 2 is the main processor for carrying out various controls and computations in accordance with programs stored in the nonvolatile memory 1. A boot memory 3 stores a program with a function for starting the operation of a system in accordance with a specified control mode. When starting the system, a boot program is primarily executed among the programs stored in the nonvolatile memory 1.
    [0025] A boot program is rewritten in accordance with the writer-rewriting mode when the computer is operating alone in a factory. Conversely, the CPU [0025] 2 rewrites boot programs in accordance with the self-mode when a user operates the computer. An area designation flag 4 stored in a register (not shown in the figures) specifies a user area where a boot program, which will be used when starting the system, is stored. A RAM 5 temporarily stores data that are necessary to carry out various operations in accordance with directives from the CPU 2.
    [0026] A procedure for rewriting programs, which may include a boot program and are stored in a user area, in the self-mode performed by a computer with the above-stated structure will be explained with reference to FIG. 2. In the following, description will be given for a case where the user area A[0026] 11 is specified as a boot area (namely, when the boot area designation flag A21 contains “0” and the boot area designation flag B22 contains “1”). Here, when the contents of the nonvolatile memory 1 have been erased, all the bits erased are set to “1.”
    [0027] First, in step S[0027] 1, the CPU 2 instructs the nonvolatile memory 1 to erase the contents of the user area B12, to which a new boot program will be written, and the boot area designation flag B22. Next, in step S2, the CPU 2 writes the new boot program into the user area B12. Then in step S3, the CPU 2 writes data indicating that the user area B12 is specified as a boot area (i.e. the data “0”) into the boot area designation flag B22.
    [0028] Subsequently, in step S[0028] 4, the CPU 2 erases the contents of the user area A11 and the corresponding boot area designation flag A21 only if the processes in steps S2 and S3 have been successfully completed. As a result, the contents of the boot area designation flag A21 is set to “1.” Hereafter, the CPU 2 does not write any data into the boot area designation flag A21, so that the flag remains set at “1.” Next, the CPU 2 writes another program, which is a program other than a boot program, into the user area A11 as the need arises.
    [0029] When the system is restarted due to a reset operation during which the computer operates in the user mode, the CPU [0029] 2 reads out programs stored in the boot memory 3 and then executes these programs. As a result, the CPU 2 reads out the values of the boot area designation flags A21 and B22 to determine which of the user areas A11 or B12 has the newer boot program. Based on the determination result, the CPU 2 sets the area designation flag 4 to the data indicating the determined user area. When the system is restarted next time, the CPU 2 makes the processing branch to the new boot program stored in the user area specified by the area designation flag 4, and then the CPU 2 reads out the contents of the new boot program.
    [0030] Here, a plurality of user areas may be specified as boot areas, when a short break in the supply of power occurs during the period starting at the completion of the process in step S[0030] 3 and ending before the completion of the process in step S4. In such a case, the CPU 2 specifies a predetermined user area (e.g., the user area A11) as the boot area in preference to the other user areas.
    [0031] FIGS. 3A to [0031] 3E show a time series transition of the contents of the user areas and the corresponding boot area designation flags during the processing for rewriting a boot program.
    [0032] More specifically, FIG. 3A shows a state before rewriting a boot program. As is apparent from the figure, the user area A[0032] 11 stores a boot program, and the boot area designation flag A21 is set to “boot.” Further, the user area B 12 stores another program that is different from a boot program, and the boot area designation flag B22 is set to “non-boot.”
    [0033] Further, FIG. 3B shows a state after erasing another program stored in the user area B[0033] 12. FIG. 3C shows a state after writing a new boot program into the user area B12. FIG. 3D shows a state after setting the boot area designation flag B22 to “boot.” FIG. 3E shows a state after erasing the boot program stored in the user area A11. Owing to this erasure operation, the boot area designation flag A21 is set to “non-boot.” Thus, it is possible to write a new program into the user area Al 1 because the boot program stored therein has been erased.
    [0034] The above-described embodiment assumes that the nonvolatile memory [0034] 1 is divided into two areas, namely, the user areas A11 and B12, in order to simplify the explanation. For this reason, a single bit data “1” or “0” is set in the boot area designation flags A21 and B22.
    [0035] However, in reality, there are many cases where the nonvolatile memory [0035] 1 is divided into three or more areas. In such cases, the number of bits of a boot area designation flag, which is provided for every user area, is two bits or more as much as necessary to distinguish the individual divided areas. For instance, two bits are required for each boot area designation flag when the number of divided areas is three or four, and three bits are required for each boot area designation flag when the number of divided areas is any one of five to eight.
    [0036] Further, it is possible to record the history of rewriting of the user areas by setting the boot area designation flags, each of which is comprised of a plurality of bits, to the value corresponding to the number of times of rewriting of the user areas. [0036]
    [0037] More specifically, the following process makes it possible to record the history of the rewriting. First, the CPU [0037] 2 sets all the bits of each boot area designation flag to “1” in order to indicate that no bootable user areas are present. Thereafter, when the CPU 2 writes a boot program into a certain user area, the CPU 2 sets the lowest bit of the corresponding boot area designation flag to “0” so as to indicate that this user area is a bootable user area. Moreover, when the CPU 2 rewrites a boot program the next time, the CPU 2 sets to “0” the lowest bit and the adjacent higher bit of the boot area designation flag corresponding to the user area where the boot program is rewritten.
    [0038] Additionally, when the system is started, the CPU [0038] 2 reads out a boot program from the user area corresponding to the boot area designation flag that has the maximum number of bits set to “0” among all the boot area designation flags. The number of “0” bits contained in data to be stored in a boot area designation flag is increased by one in the direction from the lowest bit toward the highest bit each time one of the user areas is rewritten. Therefore, the CPU 2 can determine the user area where the latest boot program is stored, so that the system can be started in accordance with the latest boot program.
    [0039] Here, after the boot program corresponding to the boot area designation flag in which all bits are set to “0” has been rewritten, and then when the boot program stored in a user area is rewritten, the CPU [0039] 2 sets the boot area designation flag corresponding to this user area to the data in which the lowest bit contains “0” and all the other bits contain “1.” As a result, the CPU 2 can determine that the user area corresponding to this boot area designation flag includes the latest boot program.
    [0040] Although an embodiment of the present invention has been described with reference to the figures, the present invention should not be restricted only to this embodiment, but any modification thereof made without departing from the spirit of the present invention should be construed to fall within the scope of the present invention. [0040]
    [0041] For example, the computer may be a one-chip microcomputer in which a CPU, a nonvolatile memory, a boot memory, and area designation flags are mounted in a single chip. Conversely, the computer may also be a system that is comprised of a plurality of chips. [0041]
    [0042] Additionally, although the CPU [0042] 2 in the above-described embodiment controls the rewriting operation of a boot program by using the old boot program, a sequencer instead of the CPU 2 may carry out the same rewriting operation in accordance with a rewriting procedure stored therein.
    权利要求:
    Claims (12)
    [1" id="US-20010008011-A1-CLM-00001] 1. A computer comprising:
    a nonvolatile memory which is divided into a plurality of divided areas, each divided area being separately erasable and including a user area and a boot area designation flag indicating whether the corresponding user area is specified as a boot area;
    an area designation flag register which specifies the user area including a boot program among a plurality of user areas; and
    a processor which sets the value of said area designation flag register based on the values of a plurality of boot area designation flags,
    wherein the user area which stores programs for starting the operation of said processor is determined based on the value of said area designation flag register.
    [2" id="US-20010008011-A1-CLM-00002] 2. A computer according to
    claim 1 , further comprising: a boot memory which stores a predetermined program to be executed by said processor,
    wherein, by executing said predetermined program at the start-up of the computer in the user mode in which a user operates the computer, said processor sets the value of said area designation flag register to the data for specifying the user area including a boot program based on the values of said plurality of boot area designation flags, and subsequently executes said boot program stored in the user area specified by said area designation flag register.
    [3" id="US-20010008011-A1-CLM-00003] 3. A computer according to
    claim 1 , wherein said processor rewrites programs including a boot program that are stored in a user area.
    [4" id="US-20010008011-A1-CLM-00004] 4. A computer according to
    claim 3 , wherein said processor writes a new boot program into a user area where no boot programs are included, and then sets the value of the boot area designation flag which corresponds to the user area including said new boot program to the value indicating that the corresponding user area is specified as a boot area, and subsequently updates the value of said area designation flag register so as to specify the user area including said new boot program, and then rewrites the contents of the user area where the old boot program is stored.
    [5" id="US-20010008011-A1-CLM-00005] 5. A computer according to
    claim 1 , wherein said boot area designation flag is comprised of a plurality of flags, and said processor sets the value of said boot area designation flag to the data according to the number of times of rewriting of said user areas so as to record the history of rewriting of said user areas.
    [6" id="US-20010008011-A1-CLM-00006] 6. A computer according to
    claim 5 , wherein said processor sets a first predetermined value in every bit of the data to be written into a boot area designation flag, and changes the number of bits of a second predetermined value included in said data to be written into another boot area designation flag each time one of said user areas is rewritten, and determines the user area in which the latest boot program is stored based on the number of bits of said second predetermined value included in respective boot area designation flags.
    [7" id="US-20010008011-A1-CLM-00007] 7. A computer according to
    claim 1 , wherein said computer is a single chip microcomputer in which said processor, said nonvolatile memory, and said area designation flag register are mounted in a single chip.
    [8" id="US-20010008011-A1-CLM-00008] 8. A computer according to
    claim 1 , wherein said computer is a system in which said processor, said nonvolatile memory, and said area designation flag register are mounted in a plurality of chips.
    [9" id="US-20010008011-A1-CLM-00009] 9. A computer according to
    claim 1 , wherein said processor rewrites programs including a boot program by executing programs that are stored in the user area containing the old boot program.
    [10" id="US-20010008011-A1-CLM-00010] 10. A computer according to
    claim 1 , wherein said processor is a sequencer which stores a predetermined rewriting procedure, and rewrites programs including a boot program that are stored in a user area in accordance with said rewriting procedure.
    [11" id="US-20010008011-A1-CLM-00011] 11. A computer according to
    claim 2 , wherein said computer is a single chip microcomputer in which said processor, said nonvolatile memory, said boot memory, and said area designation flag register are mounted in a single chip.
    [12" id="US-20010008011-A1-CLM-00012] 12. A computer according to
    claim 2 , wherein said computer is a system in which said processor, said nonvolatile memory, said boot memory, and said area designation flag register are mounted in a plurality of chips.
    类似技术:
    公开号 | 公开日 | 专利标题
    US6745278B2|2004-06-01|Computer capable of rewriting an area of a non-volatile memory with a boot program during self mode operation of the computer
    US9678761B2|2017-06-13|Technology for selectively updating memory-resident images
    US7664923B2|2010-02-16|Method and system for updating software
    EP0991081B1|2005-11-30|Emulated EEPROM memory device and corresponding method
    US6601132B2|2003-07-29|Nonvolatile memory and method of writing data thereto
    US7096351B2|2006-08-22|Single-chip microcomputer and boot region switching method thereof
    JP2001209543A|2001-08-03|Program rewriting method for flash microcomputer
    JP2000065899A|2000-03-03|Semiconductor device, and its data rewriting method
    JP3727485B2|2005-12-14|Microcomputer with built-in nonvolatile memory
    US20020083427A1|2002-06-27|Embedded system capable of rapidly updating software and method for rapidly updating software of embedded system
    US7590793B2|2009-09-15|Data access controlling method in flash memory and data access controlling program
    US20050068842A1|2005-03-31|Electronic device, nonvolatile memory and method of overwriting data in nonvolatile memory
    JP2002278850A|2002-09-27|Semiconductor device
    JP3805195B2|2006-08-02|Program rewriting apparatus and program rewriting method
    JPH11282690A|1999-10-15|Method for writing control program, information processor and information processing system
    JP2001344156A|2001-12-14|Device with flash memory and data rewriting method
    JP3489524B2|2004-01-19|Non-volatile memory rewriting device for vehicle
    JP4826232B2|2011-11-30|Information processing apparatus and boot program rewriting method
    JP4031693B2|2008-01-09|Nonvolatile memory and data storage device having the same
    KR100316584B1|2001-12-12|Flash Memory To Share With Booting And Main Operation Program In System And Upgrade Method In That Memory
    JP2003288213A|2003-10-10|Boot program storage device and method of storing boot program of electronic appliance
    KR20000033437A|2000-06-15|Apparatus for implementing function of bootstrap loader
    JP2001147863A|2001-05-29|Flash memory rewrite device
    JP4408504B2|2010-02-03|GAME DEVICE AND ALLOCATION METHOD
    EP1083481A2|2001-03-14|Computer and firmware writing method and apparatus thereof
    同族专利:
    公开号 | 公开日
    EP1265135A3|2005-08-17|
    JP2001195241A|2001-07-19|
    US6745278B2|2004-06-01|
    EP1265135A2|2002-12-11|
    JP3838840B2|2006-10-25|
    KR100415371B1|2004-01-16|
    HK1049895A1|2003-05-30|
    KR20010070416A|2001-07-25|
    EP1115058A2|2001-07-11|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US6237120B1|1991-05-23|2001-05-22|Sony Corporation|Program patching of a ROM|
    US6330634B1|1997-09-30|2001-12-11|Sony Corporation|External storage apparatus having redundant boot blocks, and data processing method therefor|
    US6388763B1|1997-11-06|2002-05-14|Samsung Electronics Co., Ltd.|Method for processing a ROM image when electrical power supplied to a laser printer has been interrupted|
    US6205548B1|1998-07-31|2001-03-20|Intel Corporation|Methods and apparatus for updating a nonvolatile memory|US20050246513A1|2004-04-30|2005-11-03|Nec Electronics Corporation|Electronic control device and data adjustment method|
    US7383431B2|2002-06-11|2008-06-03|Seiko Epson Corporation|Control system and method for rewriting data in a flash memory and a data storage medium in which a program is stored for rewriting data in a flash memory|
    US8433886B2|2009-02-13|2013-04-30|Samsung Electronics Co., Ltd|Nonvolatile memory device including a buffer RAM and boot code management method thereof|
    CN104111851A|2014-07-18|2014-10-22|广州市中海达测绘仪器有限公司|Embedded system switching starter|
    US20150067242A1|2013-08-28|2015-03-05|Kyocera Document Solutions Inc.|Information processing device|
    US20160055068A1|2013-04-23|2016-02-25|Hewlett-Packard Development Company, L.P.|Recovering from Compromised System Boot Code|
    US9990255B2|2013-04-23|2018-06-05|Hewlett-Packard Development Company, L.P.|Repairing compromised system data in a non-volatile memory|
    US10341361B2|2017-06-05|2019-07-02|Hewlett Packard Enterprise Development Lp|Transmitting secure information|US5155837A|1989-03-02|1992-10-13|Bell Communications Research, Inc.|Methods and apparatus for software retrofitting|
    US5568641A|1995-01-18|1996-10-22|Hewlett-Packard Company|Powerfail durable flash EEPROM upgrade|
    EP0794484A3|1996-03-04|1999-05-06|Nec Corporation|Partitioned hard disk drives and partitioning scheme for hard disk drives|
    JP2940480B2|1996-07-05|1999-08-25|日本電気株式会社|Computer system|
    US5819087A|1996-07-19|1998-10-06|Compaq Computer Corporation|Flash ROM sharing between processor and microcontroller during booting and handling warm-booting events|
    JPH10149282A|1996-11-20|1998-06-02|Denso Corp|Memory rewriting system for electronic device|
    JPH1139151A|1997-07-16|1999-02-12|Matsushita Electric Ind Co Ltd|Information processor|
    JPH11175346A|1997-12-17|1999-07-02|Sony Corp|Information processor, information processing method and provision medium|
    US5987605A|1998-02-28|1999-11-16|Hewlett-Packard Co.|Methods and apparatus for dual-boot memory selection, update, and recovery in a programmable device|
    DE19810814B4|1998-03-12|2004-10-28|Telefonaktiebolaget Lm Ericsson |Computer system and status copying process for scalable software updates|JP2002268905A|2001-03-07|2002-09-20|Canon Inc|Program operating device, program write controller, program write control method and storage medium|
    JP4840553B2|2001-07-31|2011-12-21|日本電気株式会社|Wireless communication apparatus, boot program rewriting method and program|
    JP2003084982A|2001-09-11|2003-03-20|Konica Corp|Method and system for installing program in image processor, image processor having program rewrite function and program rewrite method for image processor|
    JP3830867B2|2002-07-10|2006-10-11|Ｎｅｃエレクトロニクス株式会社|Single-chip microcomputer and its boot area switching method|
    US7143275B2|2002-08-01|2006-11-28|Hewlett-Packard Development Company, L.P.|System firmware back-up using a BIOS-accessible pre-boot partition|
    CN1260642C|2002-11-18|2006-06-21|深圳市朗科科技有限公司|Method for transmitting command and data to portable storage device|
    US20050010811A1|2003-06-16|2005-01-13|Zimmer Vincent J.|Method and system to support network port authentication from out-of-band firmware|
    JP4229896B2|2004-10-14|2009-02-25|シャープ株式会社|Rewritable nonvolatile memory, electronic device, rewriteable nonvolatile memory rewrite method, and rewrite program|
    JP2006227830A|2005-02-16|2006-08-31|Seiko Epson Corp|Information processor and method for controlling information processor|
    AT381061T|2005-03-08|2007-12-15|Bosch Gmbh Robert|METHOD AND DEVICE FOR RESTORING A SECTOR WITH BOOT LOADER SOFTWARE IN A SECTOR-CANCELED NON-VOLATILE SEMICONDUCTOR MEMORY|
    KR100597787B1|2005-03-21|2006-07-06|삼성전자주식회사|Multi chip package device|
    FR2903791B1|2006-07-13|2008-10-17|Airbus France Sas|METHOD FOR DOWNLOADING A SOFTWARE MODULE.|
    DE102008010556A1|2008-02-22|2009-09-03|Robert Bosch Gmbh|Method and device for storing information data|
    KR20100121215A|2009-05-08|2010-11-17|삼성전자주식회사|Semiconductor device and method for writing os image using the same|
    CN102135891B|2010-01-21|2013-06-26|杭州华三通信技术有限公司|System capable of realizing bootload, bootload control device and method|
    EP2551636A1|2011-07-25|2013-01-30|Leica Geosystems AG|Contact-free measuring device and method for controlling the same|
    法律状态:
    2001-01-02| AS| Assignment|Owner name: NEC CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OBA, KAORI;REEL/FRAME:011426/0398 Effective date: 20001225 |
    2003-02-19| AS| Assignment|Owner name: NEC ELECTRONICS CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013740/0570 Effective date: 20021101 |
    2007-11-05| FPAY| Fee payment|Year of fee payment: 4 |
    2010-11-18| AS| Assignment|Owner name: RENESAS ELECTRONICS CORPORATION, JAPAN Free format text: CHANGE OF NAME;ASSIGNOR:NEC ELECTRONICS CORPORATION;REEL/FRAME:025375/0918 Effective date: 20100401 |
    2011-09-20| FPAY| Fee payment|Year of fee payment: 8 |
    2016-01-08| REMI| Maintenance fee reminder mailed|
    2016-06-01| LAPS| Lapse for failure to pay maintenance fees|
    2016-06-27| STCH| Information on status: patent discontinuation|Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
    2016-07-19| FP| Lapsed due to failure to pay maintenance fee|Effective date: 20160601 |
    优先权:
    申请号 | 申请日 | 专利标题
    JPPATENT2000-001115||2000-01-06||
    JP2000-001115||2000-01-06||
    JP2000001115A|JP3838840B2|2000-01-06|2000-01-06|Computer|
    [返回顶部]